Hello, I am getting the following error while trying to synthesize: "[ERROR]: There are setup violations in the design at the typical corner." Does anybody know how do I fix the setup time?

During synthesis? Provide complete log and show in terminal

@Nikola Babić Does this help?

@Mitch Bailey Sorry for the late response. The message just kind of got lost. Unfortunately it did not help, but I managed to fix the issue myself. Thanks anyway!