Hi <@U0172QZ342D> can we make an external clk of 2...
# caravel
s
Hi @Matt Venn can we make an external clk of 2GHz in cocotb test bench to input to analog pins? The riscV still needs to run at 10 MHz
m
yes you can make the cocotb test create any frequency as a stimulus.
but why would you want a 2ghz stimulus?
s
I have a serdes in my user area transmitting at 2GHz. It’s called openserdes
I tried the following code but the gpio does not have any signal @Anton Maurovic (efabless support) @Matt Venn
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# SPDX-License-Identifier: Apache-2.0

from caravel_cocotb.caravel_interfaces import test_configure
from caravel_cocotb.caravel_interfaces import report_test
import cocotb
from cocotb.clock import Clock
#from cocotb.trigger import RisingEdge, ClockCycles

@cocotb.test()
@report_test
async def counter_wb(dut):
   caravelEnv = await test_configure(dut,timeout_cycles=100000)
   
   # To test & see if we can flip the gpios at all. 
   caravelEnv.drive_gpio_in((31,0),0xFFFFFFFF)
   caravelEnv.drive_gpio_in((31,0),0x00000000)
    
    # Generate a 2 GHz clock signal on a digital input pin (using gpio_0)
    cocotb.log.info(f"[TEST] Starting 2 GHz clock on gpio_14")
    clock = Clock(dut.gpio14, 0.5, units="ns")  # 0.5 ns period = 2 GHz
    await cocotb.start(clock.start())
    

    
    cocotb.log.info(f"[TEST] Start counter_wb test")  
    # wait for start of sending
    await caravelEnv.release_csb()
    await caravelEnv.wait_mgmt_gpio(1)
    cocotb.log.info(f"[TEST] finish configuration") 
    # Now wait util the mgmt gpio pin goes low again, so we know we reach the end of our firmware...
    await caravelEnv.wait_mgmt_gpio(0)
a
I don't know whether it will be possible to make this work as you expect @samarth jain but for starters, those two lines where you try to flip 32 GPIOs won't do anything because there are no time events in between; you would (for example) at least need to insert statements that advance the clock. Does your firmware correctly configure all GPIOs as inputs, by the way?
The next thing I'd suggest is: Does your gpio14 clock work if you give it a 1us period (1MHz)? If not, then what if you get rid of the "drive_gpio_in" lines completely? I'm wondering if they're overriding the Clock() generator
s
Without those drive_gpio_in instructions the gpio pins stay uninitialized throughout.
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clock = Clock(dut.gpio14, 0.5, units="ns")  # 0.5 ns period = 2 GHz
I think the dut.gpio14 is the problem. Is there a way to see the dut variables available to interface with.
Turns out gpio14 isn't mprj_io14. Got confused there. We will now try to attach it into our SERDES. Thanks for the help!
a
No worries 🙂 Just one other thing: If those other GPIOs are not driven, and if they are definitely configured as inputs, then they should be Z, not X... so not sure if you need to check your firmware's GPIO config routine
Is this intended to target Caravan, by the way?
s
I do have this line in my C firmware.
No, I think this is for a caravel chip.
a
I'm not sure how much of a 2GHz signal you'll get on the analog tie of a Caravel IO cell... they attenuate steeply above 50MHz.
s
I have successfully managed to run the RiscV at 100MHz, it wasn't too unstable. Although, 2GHz is 20x that...
a
All Caravel IO cells (both the digital and analog paths in them) are only rated for about 50MHz, or 66MHz for one direction (I can't remember which). 100MHz might still be able to work, but I expect things will start to break down quickly after that. For 2GHz, you'll need careful design, and you'll need to use the Caravan bare analog pads. You said this is for SERDES, right? @Tim Edwards do you agree, or have any other advice?
s
@Anton Maurovic (efabless support) I have modified the pad design and placed them in user area. yes its for serdes. I have removed some rings
a
Ah right. So you'll be ordering bare dice?
s
yes
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