Hi, I've got a super simple design I want to use as the control block for a mixed signal project. Don't know if it's related, but I played with some "FP_PDN_*" settings to try and make it as small as possible. It hardens fine, and simulations from parax run fine, but it is failing LVS in openlane. I'll include the entire set of instances for the failing step, below, but looks like it's expecting 3

sky130_fd_sc_hd__decap_3

instances, and only finding one. Why's this happening and how can I make it stop? Let me know if you need any more info, and thanks for considering the question.

Contents of circuit 1:  Circuit: 'passgatesTop'

Circuit passgatesTop contains 30 device instances.

Class: sky130_fd_sc_hd__buf_1 instances:   8

Class: sky130_ef_sc_hd__decap_12 instances:   1

Class: sky130_fd_sc_hd__clkbuf_1 instances:   6

Class: sky130_fd_sc_hd__and2b_1 instances:   2

Class: sky130_fd_sc_hd__decap_3 instances:   3

Class: sky130_fd_sc_hd__or2_1 instances:   1

Class: sky130_fd_sc_hd__nand2_1 instances:   1

Class: sky130_fd_sc_hd__and2_1 instances:   1

Class: sky130_fd_sc_hd__dlymetal6s2s_1 instances:   2

Class: sky130_fd_sc_hd__fill_1 instances:   1

Class: sky130_fd_sc_hd__fill_2 instances:   1

Class: sky130_fd_sc_hd__or2b_1 instances:   2

Class: sky130_fd_sc_hd__nor2_1 instances:   1

Circuit contains 32 nets, and 2 disconnected pins.

Contents of circuit 2:  Circuit: 'passgatesTop'

Circuit passgatesTop contains 28 device instances.

Class: sky130_fd_sc_hd__buf_1 instances:   8

Class: sky130_ef_sc_hd__decap_12 instances:   1

Class: sky130_fd_sc_hd__clkbuf_1 instances:   6

Class: sky130_fd_sc_hd__and2b_1 instances:   2

Class: sky130_fd_sc_hd__decap_3 instances:   1

Class: sky130_fd_sc_hd__or2_1 instances:   1

Class: sky130_fd_sc_hd__nand2_1 instances:   1

Class: sky130_fd_sc_hd__and2_1 instances:   1

Class: sky130_fd_sc_hd__dlymetal6s2s_1 instances:   2

Class: sky130_fd_sc_hd__fill_1 instances:   1

Class: sky130_fd_sc_hd__fill_2 instances:   1

Class: sky130_fd_sc_hd__or2b_1 instances:   2

Class: sky130_fd_sc_hd__nor2_1 instances:   1

Circuit contains 28 nets, and 2 disconnected pins.

Circuit 1 contains 30 devices, Circuit 2 contains 28 devices. *** MISMATCH ***

Circuit 1 contains 32 nets,    Circuit 2 contains 28 nets. *** MISMATCH ***

Is that project online somewhere ?

Nah, just playing with it now, haven't got a repo up.

If you've been playing with the PDN, check the GDS maybe something will be obvious as to what got broken.

No, don't think so. I've used the GDS, brought it into magic, integrated with other stuff. Did parasitic extraction, and the simulations with that work fine and behave as expected.

@Pat Deegan the top half is from the extracted layout. All the decap cells should be in parallel and reduced to one device. Sometime narrow strips of standard cells on the sides of hard macros will miss a power rail connection and result in fill/tap/decap cells with a missing power connection.

Ah, ok, that makes sense... it's a small (something like 14x14um) block. Tried to tell it to grow the die area, but it still keeps everything scrunched. Will try to do that and reduce the target density, see if the problem gets solved.