Hi, How do plot the id against the sweep of trans...
# analog-design
a
Hi, How do plot the id against the sweep of transistor width? I have the following netlist
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** sch_path: /home/acv/vlsi/untitled.sch
**.subckt untitled
V1 net2 GND 1.8
V2 net1 GND 0.9
XM1 net2 net1 GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)'
+ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
**** begin user architecture code
.lib ~/share/pdk/sky130B/libs.tech/combined/sky130.lib.spice tt


.control
save all
op
.endc


**** end user architecture code
**.ends
.GLOBAL GND
.end