Hi to all. What is a guard-ring? How can I tell if my (quite complex) circuit needs them? I'm using a non-standard CMOS design, although I do use discrete voltage levels.

A guard ring is a continuous ring of substrate and/or well connection fully surrounding your circuit. It's used to prevent latchup and ESD events. The Sky130 rules require a tap connection to substrate or well within a certain distance of all transistors. Guardrings are required for special conditions. In general you should guardring any diffusion directly connected to a bond pad. You should also guard ring any well that is doing odd things with voltage. Good examples of guardrings can be found in the Sky130 GPIO cells. Here's a link from a quick Google search that provides somewhat an overview. https://www.sciencedirect.com/science/article/abs/pii/S0304388606000519

@Claudio La Rosa if you happen to be doing your layout in Magic, note that Magic has support for parametric cells (p-cells) that can create a number of standard devices based on parameters (e.g. W/L, fingers), and by default many of these include guard rings for you (which can also be turned off/on with a checkbox after placing them). If you are importing a suitable SPICE netlist into Magic, it will do this for all devices for you automatically.

@Anton Maurovic (efabless support) Yes, of course. In fact I am importing the netlist from xschem and all the devices I use have guard rings. My question is whether they really need to have them or can I save space and remove them? Is there any simulation that tells me if I need to put them?

@Claudio La Rosa Unless you’re really worried about noise, you can group the nmos inside a ptap guard ring and the pmos in one nwell inside a ntap guard ring. If you need isolated substrate, you can add deep nwell with an nwell/ntap guard ring over the entire circuit.