Koustubh
07/30/2024, 4:41 PMMitch Bailey
07/31/2024, 12:10 AMLuis Henrique Rodovalho
07/31/2024, 12:15 AMStefan Schippers
08/01/2024, 6:25 PMsky130_fd_sc_hd
buffer (sky130_fd_sc_hvl__lsbuflv2hv_1
).
The result is shown below. A schematic done this way is not much better than a textual spice netlist.
The problem is that a spice netlist does not contain any information on the position (in the schematic) of transistors / components, so translation just instantiates objects preserving connectivity by placing net labels on pins (no wires, it will be an entangled unreadable mess).Koustubh
08/02/2024, 11:53 AMpll_full.spice
netlist from netlists
folder of this project repo and using the make_sky130_sch_from_spice.awk
script from the repo you have mentioned to generate a schematic for it. I am looking for a schematic since I have the taped out chip with me and I want to identify the pins/ports in the design so I can probe/test them. But when I try to use the make_sky130_sch_from_spice.awk
I get "`Permission denied`" error and I can't run things as sudo, since my entire setup of tools has been done using the iic-osic docker image.
What changes do I need to make to utilise this script? or is there a better way to find the pins of this chip? Any help would be much appreciated.Mitch Bailey
08/02/2024, 3:40 PMawk -f make_sky130_sch_from_spice.awk pll_full.spice
Stefan Schippers
08/02/2024, 9:04 PMStefan Schippers
08/02/2024, 9:13 PMpll_full.spice
is a flattened netlist, so there is no more hierarchy. There are no filter, pd, pd_buffered, divider, ... subcircuits. The extracted netist (pll_full.spice) is just a list of interconnected transistors / backannotated parasitic lumped capacitors.
Since the hierarchy is lost you can't regenerate a hierarchic schematic from this netlist.
May be there is some other doc / file in the project that could be more helpful to create a schematic from this design.Stefan Schippers
08/02/2024, 9:32 PMpll_full.spice
. I did these steps:
• remove the .control
... .endc
section (these are simulator commands)
• remove the .lib
line (same reason as above)
• wrap the whole netlist into a .subckt pll_full
/ .ends
• Execute the script ./make_sky130_sch_from_spice.awk pll_full.spice
(make the script executable!, chmod a+x make_sky130_sch_from_spice.awk
)
• the pll_full.sch
schematic is created.
See video.Rafeeq Khan Mohammed
08/21/2024, 1:12 AMMitch Bailey
08/21/2024, 1:31 AMRafeeq Khan Mohammed
08/21/2024, 1:38 AMMitch Bailey
08/21/2024, 2:09 AMRafeeq Khan Mohammed
08/21/2024, 3:01 AM