@Matt Venn @Anton Maurovic (efabless support) i want to use the LA pins in caraval as follows la118:113 control signal to user area analog_io16 or mprj_io 26 =3.3V analog_io17 or mprj_io 27 =GND VSS TO GND ANALOG_IO12 OR MPRJ_IO 22 =3.3V ANALOG_IO15 OR MPRJ_IO25 =1.8V LA40 DAC_WL_DOWN =low ( user area control signal) LA48 DAC_WL-UP =HIGH ( user area control signal) ANALOG_IO0 OR MPRJ_IO10 OUTPUT .attached is the code but the output is not correct, could u pls help as its my first LA control program

@samarth jain I believe the analog_io pins are offset by 7 with respect to the gpio numbering.

analog_io[0] = gpio 7
…
analog_io[28] = gpio 35

From

caravel_user_project/verilog/rtl/user_project_wrapper.v

// Analog (direct connection to GPIO pad---use with caution)
    // Note that analog I/O is not available on the 7 lowest-numbered
    // GPIO pads, and so the analog_io indexing is offset from the
    // GPIO indexing by 7 (also upper 2 GPIOs do not have analog_io).

Yes I corrected it but still the LA configuration seems wrong as I still don’t get output at pads

Hi @samarth jain, I can see on line 142 you're writing the register

reg_la3_data

with the value 0x00000011, which means you're writing LA[127:96] with the pattern: 32'b0000_0000_0*000*_*000*0_0000_0000_0001_0001 -- This is turning on only LA[100] and LA[96], and turning the other 30 bits off. If you want to hit LA[118:113] then you need to target bit indices 22 down to 17 of the

reg_la3_data

register's full 32 bits. For example, writing 0x00560000 (32'b0000_0000_0*101*_*011*0_0000_0000_0000_0000) to this register would set LA[118:113] = 6'b101011. Likewise, maybe line 123 needs to be adjusted for your needs? It is turning on LA[39:36], and turning off the others in the range LA[63:31]. Does that help? The comments on line 117..120 show that the full 128 bits of the LA are split across 4x 32-bit registers.

hi @Anton Maurovic (efabless support) i have updatedmy code as below , but I still dont think even la 48 and la40 are active and changing

@samarth jain try bringing back these lines from your original source code snippet:

// Configure All LA probes as output to the cpu <== !!!note this means output FROM the CPU, and input TO the user design!!!
	reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF;    // [31:0]
	reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF;    // [63:32]
	reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF;    // [95:64]
	reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF;    // [127:96]

The intent of setting bits high in the

reg_la*_iena

registers is to set those respective lines to actively be outputs from the CPU and thus make them inputs from the perspective of your user project area. Assuming that works, then your user design should see the state of the LA pins as follows, given your most recent code snippet: • Per line 123: `reg_la1_data = 0x00010000`: ◦ LA[48] = 1 ◦ All others in LA[63:32] = 0 • Per line 142: `reg_la3_data = 0x00560000`: ◦ LA[118] = 1 ◦ LA[117] = 0 ◦ LA[116] = 1 ◦ LA[115] = 0 ◦ LA[114] = 1 ◦ LA[113] = 1

this is updated code with the suggested correction

congrats!!