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<@U01819B63HP> Sir, why there is two different out...
# xschem
k
@Stefan Schippers Sir, why there is two different output for same circuit just by changing "tran 0.1m 100" to "tran 1m 100"?
a
One simulates with 1millisecond step second one with 0.1 millisecond. Difference is the presicision of the steps
s
@Kamta Kesharwani you must set the 1st parameter (the time step) according to the highest frequency component of your circuit. If highest frequency is fmax=100MHz you must set timestep smaller than 1/(2 * fmax) = 5ns. The smaller, the better precision you get, at the cost of simulation time and output file size.
k
@Arman Avetisyan Since more presicision take lot of time to simulate , if I want to get same output what else can I do to get same output in less time? Specifically when I run my boost converter simulation for 100s with 0.1ms precision I am getting around 433mV boosted value, but when I run the simulation for 100s with 1ms precision I am getting 300mV only agetting saturated. So how will I decided how much efficient my boost converter?
s
@Kamta Kesharwani run just one simulation at very high precision (small timestep) and take this simulation result as the reference one, then increase the timestep until your simulation result is still acceptable.
@Kamta Kesharwani to speed things up it is recommended to save only a subset of nodes with some 
.save
instructions, so avoid 
.save all
or 
.options savecurrents
as these produce HUGE file sizes also slowing down simulation
k
@Stefan Schippers Thank you so much I will apply the suggested technique.
s
how are you modeling your boost converter?
if you're trying to simulate the actual physical circuit there's no way around that and you'll just have to wait the (sometimes hours) long time it takes, but otherwise you should use ideal switches and mathematical statements to model the PWM control loop
my other suggestion is to switch to Xyce instead of ngspice
it takes several hours to install, I just went through it yesterday and it was awful to figure out, but I can send you my writeup, it's made my simulations much much faster
k
@Shridhar Ambady Yes I am simulating the core block of my boost converter to check functionality. here is the circuit (Logical blocks are not added)
@Shridhar Ambady I am using Docker to run my simulations and Xyce is already there even though it will be very helpful if you send your writeup. Thank you so much.
s
For the time being use voltage controlled switches (switch.sym from the standard library) with series resistors to model the transistors
are you using the Docker from the efabless github?
k
hpretl/iic-osic-tools:latest
this was the image that i pulled in my docker.
s
yup, thats the efabless docker, that might be the person who made it idk
In Xschem under Simulation go to Configure simulators and tools and check off Xyce instead of ngspice
I can update my writeup on how to properly install everything so it natively runs on Windows instead of going through Docker
k
getting this type of error
ya, writeup will be very helpful.
s
You'll have to read the Xyce guide, you want to use PRINT, instead of SAVE
k
Thank you. I will go through this
s
This is how I set up sweeping to get I-V curves for each transistor
k
one more doubt: what is the threshold voltage of nfet_01v8
s
good question lol
thats the point of sweeping the parameters
what's your experience in CMOS design?
k
@Shridhar Ambady Interesting but sometimes irritating 😊 since we are very beginner (B.Tech), lot of time we have to spend , many doubt, many questions are coming, but at the same time I am learning a lot.
s
Threshold voltage is not a number, it's merely a convenient idea/concept that makes hand calculations easier
It also only can be used with the equation you see for MOSFETs, Id=1/2 un*Cox*W/L*(Vgs-Vth)^2*(1+lambda*Vds)
That equation does not hold for MOSFETs at the 130nm scale
k
Ohhh!!
s
The part that is true and is important to understand is inversion
Inversion has a strict definition, it's quantifiable, you can graph it, and the threshold voltage is related to how sufficiently the channel is inverted
Like if you've heard of enhancement MOSFETs vs depletion MOSFETs, the difference is in doping to create a change in the inversion level
k
Okay, Inversion layer may be formed in less voltage, I will sweep DC, and will see yes I heard enhancement mode and depletion mode mosfet
s
If you're ever confused about fundamentals in designing circuits, check out Razavi's lectures on youtube, but when it comes down to actually making circuits and all the weird effects you'll want to go to cmosedu.com and read Professor Baker's book
k
Thank you, I got a lot of help and information thank you so much again.
s
No prob! I'll publish the writeup on my blog and post it here when I get the chance tomorrow
k
@Shridhar Ambady what this error is?
s
Says you're trying to print a .tran analysis somewhere
k
somewhere means? i am doing .dc analysis, i wrote .dc in spice... how to correct?
s
Idk, you'll have to check yourself but that's what that error is saying
Issue might be the Vmeas component
Best way to measure current is to put in a Vsource and set it to 0V
k
okay, thank you
It worked
Is formation of inversion layer depends on width of the mosfet?
s
Mostly dependent on doping
k
this doping is decided by fab right?
s
Correct, similar to mobility and oxide thickness it's dependent on the process technology, you don't have any control over it
You'll notice there's multiple device models though, you can pick transistors with higher and lower thresholds
You can use that to manipulate circuit effects
k
so to get these specification in xschem? where is the model file showing these things?
where*
s
When you go to pick the models notice how some of them have "hvt" or "lvt" at the end of the name
That's high voltage threshold and low voltage threshold
k
ya, that i can see, but i did not find the specifications of these
s
It won't tell you, as there is no specific well defined number
You'll just have to create the output trace same as the other one and see how the curves are different
k
Okay
one more thing, I am still confused what will be the current equation in 130nm
since i dont know which type of scaling is this 130 nm , 1) voltage scaling or 2) constant field scaling.
s
You can use the same equation to approximate, but you'll have to tweak values from there
k
Okay.
@Stefan Schippers sorry to disturb, I need little help in layout I made transistor of width 600um I do not understand what is this device mismatch during lvs check could you please help me out. (Please suggest me if there is any other way of doing layout for large width transistor)
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