I had an issue with lvs for standard cells. I had a schematic and layout with buff_4 from hd library but the netlists don't match. The naming of pins looks different and so the netlists fail to match. I used the following command for lvs - netgen -batch lvs "buff_4_xschem.spice buff_4" "buff_4_magic.spice buff_4" /usr/local/share/pdk/sky130B/libs.tech/netgen/sky130B_setup.tcl

Could you try adding a tap cell to the layout? Looks like the well and substrate are not connected to power/ground in your current layout. Also you probably want to add VDD and GND pins to your schematic.

The skywater standard cells do not have tap connections inside the cells. Thats why it has VBN and VBP ports AND VPWR and VGND. In your schematic you need to connect bulks and sources to correct ports. Note: hvl library has the taps integrated into the cell