does combinatorial logic always use less chip area than an equivalent lookup table?

Yes. Assuming you mean just combination CMOS circuit vs same thing in the LUT

What is your combinational logic application exactly. There are instances in which this would not hold up. For example, if used LUT for an fast division algorithms(ie. to calculate a/b you do a * 1/b and store the values of 1/b in a LUT) you will use less area than your standard combinational implementation