@Tim Edwards In what way?

There are too many things to cite, for which I would have to go through both SkyWater and GF PDKs and pick out specific examples where they align very poorly. But, for one, I do not like the restriction that a library cannot begin with a number and cannot have underscores. This worked okay with SkyWater because they gave us only a handful of standard cell libraries with simple names like HS, LP, etc.; but GF has given us standard cell libraries whose only difference is the number of tracks, and which are high voltage, but there are two different definitions of "high voltage" in the process, so it makes more sense to specify the library at least by number of tracks and voltage. But you are insisting that for a library name, all those properties have to be compressed together, and then one cannot put "t7" together with "5v0" so you have to add an unnecessary "mcu" in there for no reason whatsoever, and it can't be "7t5v0" because of the arbitrary restriction of not starting a library with a number. Meanwhile, the devices are forced to have underscores all over the place, except when they don't, and you have, for instance, 1.8V FETs with, e.g., "nfet_01v8" but 3.3V FETs with, e.g., "nfet_g5v0d10v5"; and then you have "nfet_g5v0d16v0" which gives no clue to the fact that the 16V-tolerant device is an extended-drain device but the 10.5V-tolerant device is just a simple thick-oxide device (under "FET properties" you have "extenddrain" listed, but this is never used in a device name; and you have a lot of other things listed under "FET properties" which are not FET properties). And that's all just within the SkyWater process. For the GF process, how do you map the nine types of poly resistor (npolyf_u, ppolyf_u, npolyf_s, ppolyf_s, ppolyf_u_1k, ppolyf_u_2k, ppolyf_u_1k_6p0, ppolyf_u_2k_6p0, and ppolyf_u_3k) to "res_high_poly"? How do you represent the top level metal resistor in GF when the top level metal can be 0.6um, 0.9um 1.1um, or 3.0um, all of which have a different resistance? Why do you have "nvt" and "zvt" transistors when they are the same thing (the reason is because SkyWater arbitrarily named some native Vt devices "nvt" and others "zvt"). Why are the SkyWater MiM cap devices "cap_mim_m3_1" and "cap_mim_m3_2" when one of them is on metal3 and the other is on metal4? Why is the SRAM latching pFET called "special_pfet_pass"? Why do varactors not follow FET conventions? ...