Hello everyone. I tired gate-level sim, for example, make verify_io_ports-gl, etc. But they didn't work because of lack of some files. Error message is shown in log like below. /home/harada/Project/011_OpenLane/caravel_test_005_ram2/verilog/gl/caravel_core.v: No such file or directory I couldn't find this file in my environment. Where is it? In addition to gate-level sim, I tried gate-level + SDF sim, make verify-wb_port-gl-sdf, too. It has error message as below. * ERROR* [700] cannot open Verilog input file /home/harada/Project/011_OpenLane/caravel_test_005_ram2/mgmt_core_wrapper/verilog/gl/mgmt_core.v - skipped * ERROR* [700] cannot open Verilog input file /home/harada/Project/011_OpenLane/caravel_test_005_ram2/mgmt_core_wrapper/verilog/gl/DFFRAM.v - skipped * ERROR* [700] cannot open Verilog input file /home/harada/Project/011_OpenLane/caravel_test_005_ram2/caravel/verilog/gl/gpio_control_block.v - skipped * ERROR* [700] cannot open Verilog input file /home/harada/Project/011_OpenLane/caravel_test_005_ram2/caravel/verilog/gl/digital_pll.v - skipped * ERROR* [706] 8 modules or primitives unresolved after pass 2 with no progress How can I get these files?

@Yomei Harada hopefully this will help. To create your local version of

caravel_core.v

, make sure you have the

verilog/rtl/user_defines.v

settings that you want and then run

make gpio_defaults

The problem with the

verify-wb_port-gl-sdf

target is that in the current version uses

caravel_core

, and the gate level netlists for

mgmt_core

,

DFFRAM

,

gpio_control_block

,

digitial_pll

, etc have been flattened and do not exist. You might try removing the

sdf_annotate

lines for the modules that are giving errors from

verilog/dv/wb_port/wb_port_tb.v

and adding a line for

caravel_core

. Also note that there is no longer an

sdf

directory in

caravel

. It appears that the

sdf

files have been moved to

caravel/signoff/<cell>/openlane-signoff/sdf/<timing>/<cell>.<corner>.sdf

files. You could try to fix it yourself (much appreciated), or log an issue on the caravel github.

@Mitch Bailey Thank you for your reply. I run 'make gpio_defaults', but error message is shown as below. File "/home/harada/Project/011_OpenLane/caravel_test_001/caravel/scripts/gen_gpio_defaults.py", line 247, in <module> with open(caravel_path + '/mag/gpio_defaults_block.mag', 'r') as ifile: As message says, caravel directory doesn't have mag directory. How can I fix it?

It might not be in the default (

CARAVEL_LITE

) repo. Can you try

export CARAVEL_LITE=0
make install

This will delete the

CARAVEL_ROOT

directory and reinstall the full caravel directory.

I will try now. But I searched difference between caravel and caravel_lite, but I couldn't find. What is the difference?

I think caravel includes the mag and gds files and is smaller than caravel-lite.

I could run "make verify-la_test1-gl". But I couldn't find log file like verilog.log. Where is it?

Not sure. might try

find . -mtime -1

to find files modified in the past 24 hours.