I'm seeing magic DRC pass on the mag file, but then after I write the GDS, the DRC fails.

I don't know why the DRC issue happens only when re-importing, but the design of the inverter is indeed suspicious at the location of the DRC error. In the top-right corner of the inverter there is a substrate contact where the

nsubdiffcont

layer is in the pfet subcell but the

nsubdiff

layer is in the nfet subcell.

@Matt Venn do you see any warnings in the magic gds out log? Something like

cif parent and child mismatch

?

@Matt Venn: It appears that what happened here is that the user modified the generated cell layouts of the base nFET and pFET transistors to widen the guard rings. That in itself is perfectly fine; I do that sort of thing all the time. However, in one case the well guard ring of the p-device got extended by editing the wrong cell; the extension of the pFET's n+ diffusion (

nsd

in magic) guard ring is inside the nFET's cell layout. This should be completely harmless, including in the output GDS. However, when reading back the GDS, magic sees the n+ diffusion without any nwell under it (because there is no nwell in the nFET cell) and assumes that it is regular n-diffusion over substrate, which is magic type

ndiff

, not

nsd

). So it gets misinterpreted on GDS read-back. This is one of those cases where magic->GDS and GDS->magic is not symmetric. The best solution is just to move that bit of

nsd

out of the nFET's cell and into the parent cell (

inverter

) where it was probably intended to be in the first place.

Thanks Tim!