About post-layout RC extracted sims: Does anyone h...
# chipalooza
t
About post-layout RC extracted sims: Does anyone have a setup that can run the RC extracted simulations within a reasonable timeframe? I tried using the CACE RC-extracted setting, but my simulation time increased to around >30min for a relatively simple transient test (didn't finish the sims so I'm extrapolating). I know there are past threads in this channel where people have used custom extraction flows in Magic and then created a separate symbol for the extracted netlist, is this the best way to proceed? I guess I'm just wondering what the agreed-upon best approach for RC sims is as of now...
t
If you're using CACE you don't need to get too complicated with the sleight-of-hand; CACE only checks the timestamps between the schematic and the netlist, and will not regenerate the netlist if it is newer than the schematic. So you can extract your own R-C-parasitic netlist with whatever method and settings you want, and copy it over the one in
netlists/rcx/
, and it will get used. The things that I understand can be very helpful: (1) Switching to ngspice's KLU solver; (2) Making "reltol" and "abstol" much bigger; (3) Setting the extresist tolerance to a very low number like 0.001 in magic. I would recommend running a simulation with the simple layout-extracted netlist with no parasitics to make sure there are no issues resulting from a pin order mismatch between the schematic and layout netlists. If your results look meaningful but just the simulation is slow, then the pin order is probably fine and some of the tweaks suggested above may help. You do not necessarily need or want to run every simulation on every corner condition with the R-C parasitics; you can get a ballpark idea of what percentage degradation you're getting from the layout parasitics with a single simulation at typical.