Why do I get mismatch? It seems like match to me

Circuit 1 cell sky130_fd_pr__nfet_01v8 and Circuit 2 cell sky130_fd_pr__nfet_01v8 are black boxes.

Warning: Equate pins:  cell sky130_fd_pr__nfet_01v8 is a placeholder, treated as a black box.

Warning: Equate pins:  cell sky130_fd_pr__nfet_01v8 is a placeholder, treated as a black box.

Subcircuit pins:

Circuit 1: sky130_fd_pr__nfet_01v8         |Circuit 2: sky130_fd_pr__nfet_01v8

-------------------------------------------|-------------------------------------------

1                                          |1

2                                          |2

3                                          |3

4                                          |4

---------------------------------------------------------------------------------------

Cell pin lists are equivalent.

Device classes sky130_fd_pr__nfet_01v8 and sky130_fd_pr__nfet_01v8 are equivalent.

Circuit 1 cell sky130_fd_pr__pfet_01v8_lvt and Circuit 2 cell sky130_fd_pr__pfet_01v8_lvt are black boxes.

Warning: Equate pins:  cell sky130_fd_pr__pfet_01v8_lvt is a placeholder, treated as a black box.

Warning: Equate pins:  cell sky130_fd_pr__pfet_01v8_lvt is a placeholder, treated as a black box.

Subcircuit pins:

Circuit 1: sky130_fd_pr__pfet_01v8_lvt     |Circuit 2: sky130_fd_pr__pfet_01v8_lvt

-------------------------------------------|-------------------------------------------

1                                          |1

2                                          |2

3                                          |3

4                                          |4

---------------------------------------------------------------------------------------

Cell pin lists are equivalent.

Device classes sky130_fd_pr__pfet_01v8_lvt and sky130_fd_pr__pfet_01v8_lvt are equivalent.

Circuit 1 cell sky130_fd_pr__pnp_05v5_W3p40L3p40 and Circuit 2 cell sky130_fd_pr__pnp_05v5_W3p40L3p40 are black boxes.

Warning: Equate pins:  cell sky130_fd_pr__pnp_05v5_W3p40L3p40 is a placeholder, treated as a black box.

Warning: Equate pins:  cell sky130_fd_pr__pnp_05v5_W3p40L3p40 is a placeholder, treated as a black box.

Subcircuit pins:

Circuit 1: sky130_fd_pr__pnp_05v5_W3p40L3p |Circuit 2: sky130_fd_pr__pnp_05v5_W3p40L3p

-------------------------------------------|-------------------------------------------

1                                          |1

2                                          |2

3                                          |3

---------------------------------------------------------------------------------------

Cell pin lists are equivalent.

Device classes sky130_fd_pr__pnp_05v5_W3p40L3p40 and sky130_fd_pr__pnp_05v5_W3p40L3p40 are equivalent.

Circuit 1 cell sky130_fd_pr__pfet_01v8 and Circuit 2 cell sky130_fd_pr__pfet_01v8 are black boxes.

Warning: Equate pins:  cell sky130_fd_pr__pfet_01v8 is a placeholder, treated as a black box.

Warning: Equate pins:  cell sky130_fd_pr__pfet_01v8 is a placeholder, treated as a black box.

Subcircuit pins:

Circuit 1: sky130_fd_pr__pfet_01v8         |Circuit 2: sky130_fd_pr__pfet_01v8

-------------------------------------------|-------------------------------------------

1                                          |1

2                                          |2

3                                          |3

4                                          |4

---------------------------------------------------------------------------------------

Cell pin lists are equivalent.

Device classes sky130_fd_pr__pfet_01v8 and sky130_fd_pr__pfet_01v8 are equivalent.

Flattening unmatched subcell buffer in circuit sky130_od_ip__tempsensor_ext_vp (0)(2 instances)

Class temp_sensor_lvs_rcx (1):  Merged 4 parallel devices.

Subcircuit summary:

Circuit 1: sky130_od_ip__tempsensor_ext_vp |Circuit 2: temp_sensor_lvs_rcx

-------------------------------------------|-------------------------------------------

sky130_fd_pr__pnp_05v5_W3p40L3p40 (2)      |sky130_fd_pr__pnp_05v5_W3p40L3p40 (2)

sky130_fd_pr__nfet_01v8 (9)                |sky130_fd_pr__nfet_01v8 (9)

sky130_fd_pr__pfet_01v8 (3)                |sky130_fd_pr__pfet_01v8 (3)

sky130_fd_pr__pfet_01v8_lvt (10->6)        |sky130_fd_pr__pfet_01v8_lvt (10->6)

Number of devices: 20                      |Number of devices: 20

Number of nets: 13 **Mismatch**            |Number of nets: 15 **Mismatch**

---------------------------------------------------------------------------------------

NET mismatches: Class fragments follow (with fanout counts):

Circuit 1: sky130_od_ip__tempsensor_ext_vp |Circuit 2: temp_sensor_lvs_rcx

---------------------------------------------------------------------------------------

Net: vp                                    |Net: a_4888_2079#

sky130_fd_pr__nfet_01v8/(1|3) = 1        |  sky130_fd_pr__nfet_01v8/(1|3) = 1

sky130_fd_pr__nfet_01v8/2 = 1            |  sky130_fd_pr__nfet_01v8/2 = 1

sky130_fd_pr__pfet_01v8/(1|3) = 2        |  sky130_fd_pr__pfet_01v8/(1|3) = 2

sky130_fd_pr__pfet_01v8_lvt/2 = 2        |  sky130_fd_pr__pfet_01v8_lvt/2 = 2

---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------

Net: vdd                                   |Net: vdd

sky130_fd_pr__pfet_01v8/(1|3) = 3        |  sky130_fd_pr__pfet_01v8/(1|3) = 3

sky130_fd_pr__pfet_01v8/4 = 3            |  sky130_fd_pr__pfet_01v8/4 = 3

sky130_fd_pr__pfet_01v8_lvt/(1|3) = 6    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 6

sky130_fd_pr__pfet_01v8_lvt/4 = 6        |  sky130_fd_pr__pfet_01v8_lvt/4 = 6

---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------

Net: ena                                   |Net: ena

sky130_fd_pr__pfet_01v8/2 = 1            |  sky130_fd_pr__pfet_01v8/2 = 1

sky130_fd_pr__nfet_01v8/2 = 3            |  sky130_fd_pr__nfet_01v8/2 = 3

---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------

Net: vss                                   |Net: vss

sky130_fd_pr__pnp_05v5_W3p40L3p40/1 = 2  |  sky130_fd_pr__pnp_05v5_W3p40L3p40/1 = 2

sky130_fd_pr__pnp_05v5_W3p40L3p40/2 = 2  |  sky130_fd_pr__pnp_05v5_W3p40L3p40/2 = 2

sky130_fd_pr__nfet_01v8/4 = 9            |  sky130_fd_pr__nfet_01v8/4 = 9

sky130_fd_pr__nfet_01v8/(1|3) = 3        |  sky130_fd_pr__nfet_01v8/(1|3) = 3

---------------------------------------------------------------------------------------

Netlists do not match.

Subcircuit pins:

Circuit 1: sky130_od_ip__tempsensor_ext_vp |Circuit 2: temp_sensor_lvs_rcx

-------------------------------------------|-------------------------------------------

Cell pin lists are equivalent.

Device classes sky130_od_ip__tempsensor_ext_vp and temp_sensor_lvs_rcx are equivalent.

Final result: Netlists do not match.

I'm not sure, but I think this has to do with not having pins on your top level. At least the last section

Subcircuit pins:

should have content. Try swapping the order of schematic and layout passed to netgen and see if it gives some more meaningful output.

Same results 😕 . And I do have pins on my top level both in the schematics and layout

I will take a look.