Hello I m doing a project with sky130 technology and I m hav open-source-silicon.dev #sky130

Hello. I'm doing a project with sky130 technology ...

EDSON ALVES DA SILVA

04/12/2024, 12:35 AM

Hello. I'm doing a project with sky130 technology and I'm having difficulty exporting the spice model from xschem to magic correctly. I had already carried out this procedure with a smaller hierarchy block smoothly running up to LVS, but now I had to do it from the top, instantiating the blocks, I was unable to do the export correctly and LVS failed. Can anybody help me?

comp.out

EDSON ALVES DA SILVA

04/12/2024, 12:37 AM

This is the top photo.

Mitch Bailey

04/12/2024, 12:42 AM

ldo_gnd

is shorted to

ldo_gnd

Copy code

Net: ldo_out                               |Net: ldo_out                               
  Ota_esq/Vin = 1                          |  Ota_esq/Vin = 1                          
  sky130_fd_pr__nfet_03v3_nvt/3 = 15       |  sky130_fd_pr__nfet_03v3_nvt/3 = 1        
  sky130_fd_pr__nfet_03v3_nvt/4 = 30       |  sky130_fd_pr__nfet_03v3_nvt/4 = 1        
  sky130_fd_pr__nfet_03v3_nvt/1 = 15       |                                           
  Ota_esq/VSS = 1                          |                                           
                                           |                                           
Net: ldo_ref                               |Net: ldo_ref                               
  Ota_esq/Vip = 1                          |  Ota_esq/Vip = 1                          
                                           |                                           
Net: ldo_ibias                             |Net: ldo_ibias                             
  Ota_esq/Ibias = 1                        |  Ota_esq/Ibias = 1                        
                                           |                                           
(no matching net)                          |Net: ldo_gnd                               
                                           |  Ota_esq/VSS = 1

probably through the psubstrate. Do you really want to connect the bulk terminal (psubstrate = ground) of the nfet in

LDO

ldo_out

? If you do, you probably want to isolate it in a deep nwell.

Mitch Bailey

04/12/2024, 12:45 AM

Also, what command are you using to run lvs? You might be missing the setup file.

EDSON ALVES DA SILVA

04/12/2024, 12:49 AM

Here is the command I am using.

EDSON ALVES DA SILVA

04/12/2024, 12:53 AM

Is this your suggestion?

EDSON ALVES DA SILVA

04/12/2024, 1:15 AM

Something I noticed is that when importing spice pro magic. The AmpOp cell is not instantiated inside the top. As if there were problems with the import.

Mitch Bailey

04/12/2024, 1:27 AM

I think reading spice into magic only instantiates the primitive devices. @Tim Edwards?

EDSON ALVES DA SILVA

04/12/2024, 1:35 AM

I believe it must be related to hierarchy, especially with the generation in xschem, because I was able to import and perform the LVS successfully in the individual AmpOp cell.

Mitch Bailey

04/12/2024, 1:47 AM

netgen command looks good.

Is this your suggestion?

Yes, connect the nfet bulk to ground.

EDSON ALVES DA SILVA

04/12/2024, 2:08 AM

I tested the connection change, but I still wasn't able to import it correctly.

Mitch Bailey

04/12/2024, 2:25 AM

Connection change is for LVS. You may not be able to import macros - just primitive devices. Is the primitive nfet instantiated when you read spice? Maybe the parameters (nf=30 W=300 L= 0.5) exceed the device generator limits.

Mitch Bailey

04/12/2024, 2:26 AM

Since there’s only one device, might be easier to use the device generator manually.

EDSON ALVES DA SILVA

04/12/2024, 11:24 AM

The transistor is instanced but the OpAmp does not appear in the LDO Layout

Mitch Bailey

04/12/2024, 11:28 AM

I think reading spice into magic only instantiates the primitive devices.

You may not be able to import macros - just primitive devices.

EDSON ALVES DA SILVA

04/12/2024, 11:30 AM

I managed to make the connections by correcting the generation problems, but the LVS result is the one shown.

Mitch Bailey

04/12/2024, 11:41 AM

@EDSON ALVES DA SILVA Can you share your lvs result, extracted netlist, and schematic netlist?

EDSON ALVES DA SILVA

04/12/2024, 11:47 AM

Here are the Netlist. I renamed the netlist generated from xschem.

LDO_xschem.spice LDO.spice

Mitch Bailey

04/12/2024, 11:59 AM

@EDSON ALVES DA SILVA I only see 4 pins in the extracted layout. Do you have a

ldo_gnd

pin? If you do, it might be shorted to something

ldo_out

. Look at the messages near the end of extraction. Did you change the layout nmos bulk connection?

EDSON ALVES DA SILVA

04/12/2024, 7:06 PM

I managed to solve the problems. 1- When developing the AmpOp Layout, some transistor cells changed their name. The result is that during spice import, the program saw the difference and tried to import new transistors and ended up getting an error when finding known cells, messing up the import. 2- As you mentioned (@Mitch Bailey) the nmos transistor of w=300 had the wrong measurements and the program was not showing an error when importing, but this was damaging the import, which prevented the program from instantiating the AmpOp.

👍 1

EDSON ALVES DA SILVA

04/12/2024, 7:08 PM

Thank you very much @Mitch Bailey

9 Views

Open in Slack

Previous Next