When generating two 5v tolerant nfets (nfet_g5v0d10v5) and placing them side by side so that their guard rings overlap I'm getting the drc error "HVNTM spacing < 0.7um (hvntm.2)". Am I doing something wrong or are these fets not designed to be used in such a way?

You shouldn't have a guard ring for each transistor. They should share a single one. I think magic has an option to make transistors with incomplete guard rings. Otherwise, you should place your guard ring manually, as it wastes area.