Hello everybody, I am doing the caravel simulatio...
# caravel
e
Hello everybody, I am doing the caravel simulation but the output signal from my User_Project module does not reach the output of the top module, I directly select the user_area if it will work as input or output with the
user_defines.v
file, and I redefine the configuration in the
io_ports.c
file. In the user_defines.v file, I define if the pins will work as input or output, also, I redefine this configuration in the io_ports.c file, however the simulation shows Z for the output pins, when observing the output of the user_area this shows the output and correct operation of the module but it does not reach to connect to the GPIO port as output of the user area. I attach the images of the testbench, the signal of the port [23] comes out of the user area but does not appear in the caravel output, I have checked the GPIO configurations and these appear enabled for the MGMT despite the explicit configuration in
user_defines.v
and
io_ports.c
, what am I configured incorrectly?
1