Hello. I use digital cells of mcu7t5v0 digital sta...
# ieee-sscs-dc-23
j
Hello. I use digital cells of mcu7t5v0 digital standard cell. I copied some cell in cdl foler and made symbol as below and device models are include within xschem. However, simulation with this cdl driven symbol doesn't work well because nfet05v0, pfet05v0 can't be read.
s
Try to add a '`X`' before all mosfet (M....) lines, transforming
M_tn3
to
XM_tn3
and so on...
m
@Junbeom Park There may be a couple issues. 1. You probably want to include the spice library as opposed to the cdl library. The cdll library has
M
devices, while the spice library has
X
devices. I think the ngspice libraries are configured to use the spice
X
models here. 2. You probably don’t need to copy a local version of the cell spice. Just include the whole standard cell library. 3. You symbol should probably be
type=primitive
. I don’t think you’ll need
spice_sym_def
. 4. Make sure the format matches the pin order in the spice file.
D CLK Q VDD VNW VPW VSS
s
@Junbeom Park @Mitch Bailey answer is better, so follow his advices.
😅 1
👍 1
j
@Stefan Schippers @Mitch Bailey Thanks 🙂 But, I want to eliminate VNW and VPW to VDD and VSS because layouts contain only VDD and VSS. If I use whole standard cell library, VNW and VPW could be ignored or something else?
m
@Junbeom Park For standard cells, generally the power connections are not shown on the symbol. Instead, they are included as properties. Here’s an example from sky130.
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name=x2 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__
Using this, it’s possible to define a generic symbols
dffq_1
without
gf180mcu_fd_sc_mcu7t5v0__
The format statement would be
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format="@name @@D @@CLK @@Q @VDD @VNW @VPW @VSS @prefix@symname"
You may also need a this line in your symbol properties.
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extra="VDD VNW VPW VSS prefix"