I wonder if anyone has figured out the following f...
# analog-design
b
I wonder if anyone has figured out the following for ngspice: Run a transient analysis up to some time, save the circuit state, then use that state as the operating point for subsequent ac, noise, etc. analyses. This is frequently needed for SC circuits that need a few clock cycles to initialize, and it is supported by proprietary tools like spectre. For ngspice, I could find the thread linked below, where the question it asked at the bottom, but not answered. (I have been trying optran, but it seems that it is not meant to do what I am asking for.) https://sourceforge.net/p/ngspice/discussion/127605/thread/ca4d596065/
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c
Did you have a look at the Wrnodev command in the ngspice manual? It may be what you are looking for.
b
Great pointer, I'll try that.
Turns out that Wrnodedev writes .ic statements, which only work for seeding the initial operating point of another transient analysis. What I can't find for ngspice's AC (or NOISE) analysis is to to tell it to use a precomputed operating point. In spectre, you can do this with ac readns="foo.txt". Definitely not an original Berkeley spice feature, though.
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c
I think you are right i could not get it to work either. Even though the manual almost exactly states the usecase you stated above. "For example you may start a transient simulation, stop it and use the current data to start an ac simulation." So I'm not sure what is missing.
s
@Boris Murmann I have tested this, saving a transient
ic
file with
wrnodev
, then running another simulation, including the
ic
file and doing a
op
analysis. The result matches the node values that where saved after the transient sim. There is a caveat, however. When you resume simulation you must set the dc value of all voltage / current sources to be equal to the values they had at the time the simulation was saved. With reference to image below, where transient ic file was saved at 42ns, DC value of voltage sources for
reset_b
,
a
,
b
must be set high and
clk
must be set low, otherwise ngspice will not converge to the same ic state saved with
wrnodev
.
@Boris Murmann Also consider using wrnodev at a time point where the circuit is settled to a reasonably stable state, so not immediately after a clock or reset edge or any other signal change.
b
Thanks @Stefan Schippers. I tried exactly that and it didn't work for me. It's understood that the DC source values must match the values of the transient state. Your circuit output looks like it's digital. Does it actually have any true analog states, such as the voltage on a "floating" capacitor or charge at a capacitive divider node? Initializing a flipflop is a different, easier problem.
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Here's a test case: Take a voltage source, a switch and a capacitor with a large resistance across. Run a transient sim with the switch on to charge the capacitor and then off to let that voltage sit and save the state shortly after. Now run OP/AC/NOISE and see if that voltage is still properly initialized in these analyses' op point. Spectre does this correctly using the readns option. The parallel resistance discharges the cap under DC conditions. That's why there should not be any DC analysis done in this case; the simulator must be told to just leave that initial voltage as is. That is what readns does in spectre. In other words, an op analysis that is given some hints does not preserve the state, it will just converge to a valid DC solution, which has the cap fully discharged. This is really nothing exotic, but bread and butter functionality for anyone doing switched capacitor circuit design involving amplifiers, dynamic common mode feedback loops, etc. These circuits never operate around bias points for t->infinity, they operate at bias points that are dynamically defined in their clock cycles.
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l
I think I might have found a solution using optran. Try the following code:
Copy code
.include <wrnodev file>
.control
optran 0 0 0 0 0 uic
op
.endc
b
@Lucas Daudt Franck Interesting idea, will try it. Thanks!
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l
The funny thing is that ngspice says there is an error in optran, but it actually works as intended.
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b
It works for me as well. Simple test case:
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*ictest
c1 v1 0 1e-12
r1 v1 0 1e9
.ic v(v1)=1

.control
optran 0 0 0 0 0 uic
op
print v(v1)
.endc
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Commenting out the optran statement gives 0V, while having it gives the desired 1V. πŸ˜€
Of course, as Stefan pointed out, this has be used with care, and you have to "know what you're doing."
c
Interesting. Has someone run a ac or noise simulation afterwards?
s
@Boris Murmann I agree, for SC circuits or similar where there is no true DC state optran is probably the way to go. Not tested myself yet, though.
b
@Christoph Weiser here is an example showing that it works for subsequent ac and noise analyses:
Copy code
* ic statements will come from tran op using wrnodev
.ic v(n1)=1
c1 n1 0 1e-12
r1 n1 0 1e9

r2 n2 0 1e3
* this is a 1 Ohm resistor when v(n1)=1
b2 n2 0 I=v(n2)*v(n1)
i2 n2 0 ac 1e-3 dc 0

.control
optran 0 0 0 0 0 uic
op
print v(n1)

ac lin 1 1 1
print vm(n2)

noise v(n2) i2 lin 1 1 1
print onoise_spectrum
.endc
For
.ic v(n1)=0
the noise analysis gives 4 nV/rt-Hz, for
.ic v(n1)=1
, it gives 4 pV/rt-Hz (due to 1 Ohm in parallel with 1 kOhm. As a sidenote, I initially tried using a switch (.model sw) as the controlled element for evaluating the state of v(n1), but it seems that switches don't work in AC analysis (always off?).
c
Not really into the subject (yet), but what happens if you string replace s/`.ic`/`.nodeset`/ ?
c
Then you will only suggest a initial condition and not force it.
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