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I have a question about the `.GLOBAL GND`
`.GLOBAL VDD` added automatically by xschem to my spice netlist before simulation. I just discovered this by being suprised that my circuit worked even without power

I was trying to measure the current drawn, but I couldn't do that with i(V1) because that was then measuring the current in both the simulation and the PEX simulation

I tried renaming all VSS and VDD in my schematic to VSS_OSC and VDD_OSC, which then stops the automatic connection and I can measure just the one current

but now of course my PEX doesn't work because the ports are wrong

what's the recommended way of handling this?

It's never a good idea to use globals in SPICE netlists for an ASIC design, because it overrides all the hierarchy and connectivity.
There should be a way to get xschem not to output `.GLOBAL` statements;  I'm not sure what it is.

I think you could make a 0 V voltage source between the VDD and VDD_OSC and measure its current.

<@U0172QZ342D> The symbols for vdd and vss in the xschem library have the global property. For this reason, many of the designs I see have avoided using the vdd and vss symbols in the schematic.

When I created the schematics for the i/o cells, I copied these symbols to a local library and deleted the global property. This allows intuitive schematics without the global definition.

I use only the GND symbol (at least once) to setup a global reference ground. Otherwise I agree: No global nets in IC design, ever. This is a disastrous design fail just waiting to happen.

Likewise, I use GND in the _testbench_ which establishes a relationship to the SPICE global node `0` which is _always_ global (at least ngspice defines it this way);  there should be an absolute ground reference somewhere, but only in a testbench and never inside of a circuit that is part of an ASIC.