Hello everyone. I am synthesizing the design using OpenLane. I am getting a violation at step 15. Help me please

child killed

is often an indication that you’ve run out of memory. Can you watch the memory usage while the job is running? There are also a lot of setup/hold violations. Maybe you can look into those.

I think the problem is not the ram. I still run another design on my machine. I think the problem I'm having is setup and hold violation. I need you to help me with that part. sdc files and report sta sumary. Do you need me to provide additional reports to assist me?

@Nam Nguyễn Hồ Giang I don’t have that much experience with sta, but can you share your config file? Unless adding buffers is enabled in the timing stage, I imagine that you’ll have problems.