Need some help with the 8-bit rheostat 1.) Is the power-down state intended to disconnect the resistor ladder from the upper terminal or only minimize power consumption of the rest of the circuit? 2.) What is the ENOB parameter in the context of the rheostat? And why is it higher than the resolution of the block itself? https://docs.google.com/spreadsheets/d/132YkMiYaM0iHML5feT1yWLQIvP-pCM0lCArM9f1LxhM/edit#gid=1618608234&range=A16 3.) Is the max value of the total resistance supposed to be 55kOhm and not 5.5kOhm as in the sheet? https://docs.google.com/spreadsheets/d/132YkMiYaM0iHML5feT1yWLQIvP-pCM0lCArM9f1LxhM/edit#gid=1618608234&range=D11

(1) The latter. An "enable" for the rheostat is only meaningful if the rheostat is drawing more power than the disabled state when not in use. This is probably unlikely for most implementations. Feel free to remove the enable signal if it's not useful. The amplifiers to which the rheostat will be connected will have their own power-down states. (2) Why it's higher is easy---because I copied values from a 12-bit DAC and failed to change that one (in spite of looking over it several times). I just corrected it down to the expected 7 bits. As for why it's there at all---I've never seen a spec for an actual rheostat and I was treating it like a DAC. For which it is possible to define some configuration from which you can measure ENOB like you would for a DAC. Whether that makes sense as a parameter for a rheostat, maybe not. (3) Yes, that is definitely a misplaced decimal. Thanks for pointing out the errors!