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[Extremely newb Q] Is this a reasonable way to multiply two numbers? I've heard that device variatio...
# analog-design
l
[Extremely newb Q] Is this a reasonable way to multiply two numbers? I've heard that device variation makes this approximation terrible but how would I check for myself?
s
Sorry, I need some context. What do you exactly want to do? Do not think about the tools, just write what do you need to evaluate?
As far as I understand, By looking at the drain current you want an estimate of (Vg -Vth) * Vd ?
l
I want to multiply two voltages and get a current. I will have like 100 of these and connect the outputs then integrate the current to get dot product of two vectors
Yes
(I might be missing some basics about how the corners work and how to simulate device variation)
s
Why integrate the current? isn't the Id value already (proportional to) the product of (Vg-Vth) and Vd (in linear region, low Vd) ?
l
Yes or just use Id directly with some circuit (what circuit?). Idk the best way to get and store that value. I was thinking I would pulse all the Vds for a couple nanoseconds and collect in a capacitor somehow
s
• may be to convert current to voltage,
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l
But my main Q is about the multiplication itself
s
I don't have a final answer, I think use the simulator and do a test on a circuit. First try at one (typical) corner and no mismatch, then see what and how things change on different (slow, fast) corners.
l
Ok thanks. Sorry I should know this but what exactly do I change here to do slow and fast corners?
s
the idea is interesting
l
message has been deleted
s
to change corner edt the corner symbol (Corner: tt) and change tt to ss, ff, sf, fs (fast-slow p and n transistors)
l
Muchas gracias
s
de nada
l
I should trust the corners? If everything looks good on all the corners then I'm good and I don't need to also worry about common device variation that's not in the models?
s
(the first letter is for nfet the second for pfet, so 
fs
means fast N , slow P
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corners cover process variation, so if tou are ok and also ok with change in temperature (
.option temp=125
, for example) you are OK.
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However if your design requires identical devices then you should also do a mismatch simulation.
mismatch uses the "corner" tt_mm
l
That is in xschem manual yes? Or one of the examples in top.sch?
s
yes see the mismatch simulation in test_comparator.sch
l
Perfect! Thank you.
s
the test_comparator does multiple transient simulations to test the comparator response to a very small input dfferential signal. In your case you run multiple dc sweeps. The different curves are the result of device mismatches. Every fet is slightly different, and this simulates the real statistics of identical device variations.
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l
mismatch sim basically samples between ff and ss?
s
Also see this tutorial on the ngspice control language to set up complex testbenches, simulation loops etc.
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l
Thanks yes that one's great I've read some of it before but need to understand better
s
mismatch simulates differences but the amplitude of differences is much smaller that the difference between 
ss
and 
ff
. ss and ff are process variations, that means you may get a wafer with fast transistors and a wafer with slow transistors. Within a wafer there are device mismatches arouund the wafer median value, but these are much smaller. If two input transistors in a differential amplifier are one rated af 
f
and the other rated at 
s
nothing will work :-)
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l
Great explanation 🍻
s
Another suggestion: for analog precision simulations use big transistors (no small W or small L). Mismatch standard deviation is inversely proportional to the square root or the transistor area, so big transistors --> low mismatch
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t
@Luke Harold Miles: Maybe what you are looking for is the Gilbert transconductance multiplier (Barrie Gilbert, 1968) https://en.wikipedia.org/wiki/Gilbert_cell. This works best with bipolar transistors but can also be done with FET devices in subthreshold (Carver Mead, Analog VLSI and Neural Systems pp. 90 to 96).
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r
Another common way to do it is with a differential pair whose tail current is controlled with a mosfet. Then you can apply one voltage to the diff pair, and another voltage to the current source mosfet. Then you steer current which for small signals can look like a multiplication of the two
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l
@Ryan Brandt You mean like this?
That looks more complicated than what you said
r
I was thinking something more along these lines:
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The first is simpler with only 3 transistors, but the two voltage inputs would have to have different ranges of analog values to make it work since the tail current source is below the input diff pair. The second has an extra transistor but performs some level shifting (and an inversion) to make the two inputs at the same level. Not sure if this is practical but it was the first thing that came to mind
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I think the idea I described is functionally quite similar to a gilbert cell (though I haven't studied those before). I think the gilbert cell just doubles the diff pair structure so you get more symmetry and less harmonic distortion? Someone more experienced can probably comment more. But if you don't care about spectral purity, going with the half structure like what I described could be a way to save space
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Although I'm not suggesting BJTs and it looks like the gilbert cell also crosses the collectors of the diff pairs so perhaps it's a totally different topology. Would love to hear an explanation from someone who has more experience!
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l
I tried out your half cell and the multiplication isn't too bad. I should probably replace the resistors with much larger active ones though.
r
If you want better linearity with respect to your two inputs you would probably need a feedback control circuit. Although there's probably some tricks to be played with biasing to maximize the linear range of operation here. I'm not sure what kinds of improvements you can expect with careful biasing though. As always, there are tradeoffs between simplicity and performance
feedback 1
One neat trick you can do with feedback control stuff is to use a matched secondary diff pair which has a test signal applied to it in-situ while fixing the other input to whatever value is being presented in the primary circuit, and then measure the gain achieved in the secondary one while controlling some other parameter in all the circuits. As long as they're all matched you can use the measured value in the secondary to infer the behavior of the primary without disrupting its performance
That can be particularly handy if you have, for example, multiple inputs. In the case of the controllable tail current, if you wanted a precise gain, you could create a second diff pair of the same topology, apply a small differential signal to the top diff pair, measure the resulting gain, and then compare it to some reference, feeding back the amplified difference to control the tail current, in order to get the gain you want. Then you have to worry about stability issues and loop compensation, but it will give you very linear performance if you get it right
Similar techniques are used in automatic gain control circuits. But they appear in many other places too
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