@Matt Venn @Tim Edwards what is this net Vdda? It’s vdda1 or vdda2 ? I see the motherboard provides 1.8V to vcca1 and 3.3 V to vddio. What about vdda1 ,vdda2 and other vcca2 ?

The Caravel chip has several different power inputs:

vccd

,

vccd1

,

vccd2

,

vdda

,

vdda1

,

vdda2

,

vddio

(and

gnd

). The nets

vccd

&

vdda

are used by Caravel itself while

vccd1

,

vccd2

,

vdda1

&

vdda2

gets passed to your design.

vddio

is used by the level shifters for the io pads. On the development board

vccd

has a fixed connection to 1.8V and

vdda

is connected to 3.3V. The user signal

vccd1

is also connected to 1.8V, but it goes through the

J3

jumper where you can cut the trace to supply your own voltage on the

vccd1

pin. Similarly

vddio

is connected to 3.3V but goes through the

J5

jumper. Finally

vccd2

,

vdda1

&

vdda2

are not connected to any voltage source and you are supposed to provide them yourself.

No vdda1 is not connected to 3.3V!? @htamas vddio is connected to j5

Sorry, made a mistake there - updated the comment.

@samarth jain: In theory, the value of

vdda

,

vdda1

, and

vdda2

should not matter at all unless you are using them (

vdda1

or

vdda2

) inside the user project area; they are isolated analog domains and should be able to be set independently.

By contrast, from probing a GFMPW0 chip it appears all the pins in those positions are the same single net on the die, forming (I assume) a series of connected 5V power rings and no separate power domains… do I have that right?

@Anton Maurovic: Yes, you have that right. The padframe cells in the GF version are very limited and effectively have only a single power and ground net. All of the foundry IP for the process we have consists of 5V transistors, so there wasn't a lot of incentive to go redesigning pad cells to isolate voltage domains.

Thanks for that, @Tim Edwards . I’ve also noticed from probing that the EP (thermal) pad of the QFN appears not to be connected… Is the die just adhered to it? Is this the same also for sky130 QFNs? In any case I will treat this one as VSS, as recommended. I don’t yet know the full typical details of packaging, so excuse the ignorant question.

It's possible, although I would find that surprising. It would mean that the adhesive is thermally but not electrically conductive, but more likely it's just that the substrate is highly resistive and there is no direct down-bond to the pad (I have to review my wirebond diagram). It would not make much difference, because the ground domain is wire-bonded out to pads, and there is no dependence on the conductivity of the pad. But if the pad is connected at all, it will need to be at VSS.

Great, thanks for the clarification :)