Is the caravel packaging wire bond or flip chip?
# efabless
w
Is the caravel packaging wire bond or flip chip?
m
caravel is the harness we use to tapeout, it's the padring and has so far always contained the riscv processor
so it's more of an IP than something physical
I guess you mean what package do we get from chipIgnite ?
In which case the answer is QFN, inside is the die wirebonded to a leadframe
t
We have not done flip-chip recently due to the expense (both time and money). Although the wirebonding got rather back-logged with MPW-5 through MPW-8, we will probably stick with packaging in wirebonded QFN packages unless we can find another vendor or negotiate a better deal on price and turnaround time for the WLCSP.
🌎 2
w
Okay cool! I was trying to look under the hood and see how you go from user project wrapper to package. It looks like you use a cell similar to the foundry provided gpio2? Does that expose a pad on the top of the die that then gets wire bond?
t
I don't really get that question. The user project wrapper gets placed inside the caravel harness chip; the caravel harness chip has a padframe with 63 bond pads, including gpiov2 plus power and ground pads and others. This is all spelled out in the caravel documentation.