@Akash Levy @Mitch Bailey hello i have attached my schematic simulation does it works like this for multiple levels and also i have a question i have given vbl input in gaw waveform vbl is showing different as per the given input and forming do i need to give seperate voltage i just given the voltage in vwl ( 0 2.8) voltage above the transitor threshold

usually you want to keep VSL=0 while doing SET and VBL=0 during RESET. i’m a little confused by these waveforms, because it is not clear where the set pulses and reset pulses are. you are also using triangular pulses, i have mostly used square pulses myself

@Akash Levy thank you so much reference suggestions sorry I am getting lot of doubts because its completely new to me resistors should be placed in series at BL ?and also I am little confused that do I need to apply forming voltage when doing this all or it will be internal forming will be enabled? I will go through your paper to know more the concept.

Yes, please look at chapter 4 of this book

@Akash Levy THANK YOU so much could you please also give answer to the above questions also i wanted to change the levels for single stand alone 1T1R will there be any changes than array

I’m a little confused by what you are asking. When you say resistors should be placed in series at BL, do you mean the RRAM cells? Or some reference resistor?

@Akash Levy thank you

Your PWL is still defined in a really strange way. Problem is that you are changing both BL and SL at the same time. Typically, one is set to 0 while you vary the other one. Yeah you don’t have to do reference resistors. If you have analog I/O pins, you can just measure current off-chip. This is only useful for a test chip though, but probably good enough for you since this is your first experience with RRAM

@Akash Levy okay thank you i will try now changing the BL and SL at different time the first wave in picture would be the output right vbl? this i am starting rram for the chip fabrication

I don’t know what you mean by the first wave is the “output.” The “output” is really the current so I(VBL1). When the current is high, you are in low resistance state (LRS), when current is low, you are in high resistance state (HRS). It sounds like you need to do a little bit more reading on what RRAM is and how it works. I’d recommend reading chapter 1 and chapter 4 of the book I sent. Otherwise, everything will remain confusing and it will be hard for you to make progress.

okay got it now thank you

Akash Levy could you please tell me where can i get the book that you are referring.

Hey sid, I attached it above as a PDF earlier in this thread

@Akash Levy Hello to measure the resistance r=v/i i am doing for allocation ranges from fig4 in paper rmin {LRS or set} for bl where voltage and bl high current is measure and to measure for rmax{HRS or reset} resistance should be measure in BL input and current or SL input and currrent? when measure the less current in bl its in negative so output resistance would be - i was trying to first do forming then reset for the 1t1r circuit picture to range7 and measure rmin and rmax as per the table for n=7 and follow the radar implementation algorithm the method of doing this is correct? in vwl can be increased upto 4v is there any limitations by transistor? for having the desired range eg:range7 coarse control phase and fine control phase should be repeated how many set reset{programming cycle} will happen to do this any rough idea? is there any easy way to measure resistance? in picture please dont consider inputs its the previous picture i am doing trail and error to do the above procedure

I would start by implementing the ISPP scheme instead of RADAR, because it is much simpler. In ISPP, you simply ramp the WL voltage (measuring after each pulse) and stop when your resistance reaches the desired value / range. With the OSDI RRAM model, there is no need to do FORMing. Assume the device is already FORMed. With a real device, you will need to do FORMing before you can do any RESET or SET. Yes, you can increase VWL up to 4V no problem. Up to 5V is ok for I/O transistors in SKY130, if my recollection is correct. (Others correct me if I am wrong) To measure resistance, apply small VBL=0.1V-0.2V and VSL=0, then measure current I and do R = V/I. Hope that helps 🙂

@Akash Levy thank you in ISPP scheme can I use the same allocation table and skywater is it limited to one method for storing multiple bits for chip fabrication? I will look for the ISPP scheme also just wanted to know the implementation flow chart in paper first reset to range 7 then there is n=0 so n=0 what does it mean after reset it will automatically comes in n=0 what I understood if I am wrong let me know please

sure you can use the same allocation

@Akash Levy thank you could you please reply my other thread also

@Akash Levy 5V is ok for 5V devices. I wouldn’t recommend using the

sky130_fd_sc_hd

library because those only contain 1.8V devices.

Thanks, David!