#2047 PDN pitch error Issue created by kirubakaran-g **While processing the openlane flow of the built-in design namely 'spm', all the forty steps in flow are complete, and the required reports and logs are generated. But, while processing the openlane flow for a simple Half Adder Logic, I got the following error while generating the PDN:** [STEP 6] [INFO]: Generating PDN (log: designs/ha/runs/RUN_2023.11.18_10.26.24/logs/floorplan/6-pdn.log)... [ERROR]: during executing openroad script /openlane/scripts/openroad/pdn.tcl [ERROR]: Log: designs/ha/runs/RUN_2023.11.18_10.26.24/logs/floorplan/6-pdn.log [ERROR]: Last 10 lines: [INFO]: Setting input delay to: 2.0 [WARNING STA-0337] port 'wb_clk_i' not found. [INFO]: Setting load to: 0.033442 [INFO]: Setting clock uncertainty to: 0.25 [INFO]: Setting clock transition to: 0.15 [WARNING STA-0559] transition time can not be specified for virtual clocks. [INFO]: Setting timing derate to: 5.0 % [ERROR PDN-0175] Pitch 1.8400 is too small for, must be atleast 6.6000 Error: pdn_cfg.tcl, 92 PDN-0175 child process exited abnormally [ERROR]: Creating issue reproducible... What might be the issue? Thanks in advance. The-OpenROAD-Project/OpenLane