Hi, how do we run the openLane flow for the caravel SoC. what are the variables we need to set for running the OpenLane? if any tutorial please do share. thanks bharath

I suggest starting with the user project wrapper repository https://github.com/efabless/caravel_user_project and then follow the documentation link to https://caravel-user-project.readthedocs.io/.

With

caravel_user_project

user can run

make

command to harden the project with OpenLane. Similarly what are the pre-requsities/steps required to run https://github.com/efabless/caravel/tree/main/openlane/caravel with OpenLane to understand process behind caravel_harness_soc creation?

git clone <https://github.com/efabless/caravel_user_project>
cd caravel_user_project
make setup
make user_proj_example
make user_project_wrapper
export USER_ID=0123CDEF
sed -i 's/`GPIO_MODE_INVALID/`GPIO_MODE_USER_BIDIRECTIONAL/' verilog/rtl/user_defines.v
make set_user_id
make gpio_defaults
make ship
make generate_fill
make final

You can set the

USER_ID

and

user_defines.v

constants to other values.

similar to caravel_user_project, how to run efabless/caravel for hardening caravel/caravel_core/chip_io etc.,?

@Vijayan Krishnan The above instruction create the final caravel chip. It uses prehardened

caravel_core

and

chip_io

.

yes. I am aware of that steps. I am interested to learn on hardening for caravel_core and chip_io. So looking for document or help on how to harden the chip_io with OpenLane flow. Thanks in advance

I think the just ran

make caravel_core

in the

caravel

directory, but you’d have to ask the Egypt team to be sure.

@Vijayan Krishnan: The

chip_io

cell was generated manually, not through a synthesis flow.