open-source-silicon.dev

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Has anyone done their own measurements on the resistance and know whether the values in this plot are accurate/typical?

Well there's this <https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf>

I haven’t measured before, but according to my experience, there will be device-to-device variations for sure and it’s not small actually.

We are still waiting for our test devices. I forget which MPW they were on. 5?

Yes there are large device-to-device variations on the Skywater RRAM

I was one of the authors on the paper you posted the plot from and have a lot of characterization data on the variability. Let me know if you need any of it

Thank you <@U05GF3APUTG> for pointing this out! Could you please share some data about the device-to-device variations, program cycle-to-cycle variations, and also the multi-state performance of the device(how many analog states it can achieve)? Thanks!

It can achieve roughly 8 states with &lt; 1% cell error rate, that was reported in this paper: <https://ieeexplore.ieee.org/document/9497347>

I have all the data for that paper here: <https://github.com/akashlevy/RRAM-RADAR-Tuning>

This repository has some more data: <https://github.com/akashlevy/NI-RRAM-Test-Setup/>

I’d look at `resist_sweep.csv`, which contains a sweep of the word line voltage, bit line voltage, pulse width, and the pre/post-read resistance across a bunch of cells

hope that’s a bit helpful. lmk if you have questions

Thank you so much <@U05GF3APUTG>  I will take a look at it first

Sorry, I think this link:
<https://github.com/akashlevy/NI-RRAM-Test-Setup/>
is not public available? <@U05GF3APUTG>