Hi, I am trying to run the LVS but after extracting the layout I get some big floating capacitors, is there any way to get rid of them without using shorter connections? thanks

The commands I use for LVS extraction are

load <cell>
extract no all
extract do aliases
extract do local
extract unique
extract

ext2spice lvs
ext2spice merge conservative
ext2spice short resistor
ext2spice -o <cell>.gds.spice <cell>.ext

Replace

<cell>

with your top cell.

@Amirhossein zanjani: You are not using

ext2spice lvs

and so you are getting parasitic capacitors in your netlist output, which is not what you want to do for LVS.

Thank you so much, you are right @Mitch Bailey @Tim Edwards

No,

ext2spice

with option

lvs

(or equivalently option

cthresh infinite

) ignores all parasitic capacitances. MiM caps are devices and are extracted as such.