Hi, If I want to submit a design with say 16 I/O (including power) for the Nov 6 deadline, how would I go about doing that? For example, what do I submit to whom? How do I specify which part of the padframe my submission goes to? Will I have to share the padframe with another design? Thank you.

If you're okay with only having at most 0.25 mm^2 (rather than the full 10 mm^2), and you're okay with doing a pure digital design with OpenLane, I highly recommend checking out @Matt Venn's TinyTapeout. He's solved basically all of the difficulties for you, and you can literally just paste in your Verilog, and hit submit -- it's easily doable in an hour. You get 8 input pins, 8 output pins, and 8 bidir pins, which sounds like it might be enough for you.