Hi all, I generated memories using OpenRAM, the libfile is generated with some missed pins, especially "spare_wen0", "din0[64]" and "dout0[64]" while they are presenting the lef file. Also, when I tried to integrate the memory using openlane flow I got some LVS errors of missing and mismatched nets. PS: SRAM word size is 64 bits.

Please file an issue with an example.

is this issue fixed? i got the same problem.

Was an issue filed? I don't see one

there is a new issue posted with similar question on github issue page 3 hours ago, the config problems occurs when the rw port number is 1, and num_spare_col=1, num_spare_row=1