Hi, Can you please tell if Open Ram support banks right now @Matthew Guthaus? When I tried to run by putting "num_banks = 2" in config file , I got error saying "bl0 net is not found in timing paths"

It should generate a soft multi bank. @Bugra Onal added this feature.

Sorry, I did not get you . Can you please elaborate on what is 'soft multi bank'?

This generates two hard banks that are combined with a synthesized Verilog module to combine them. Like this: https://github.com/VLSIDA/openram_testchip2/blob/main/verilog/rtl/sky130_sram_2kbyte_32b_2bank.v

Hi, is this feature supported now? I am getting exactly the same error message when using multi-bank configs.