May I ask for a summary status of latch-up? There are 12 “latch-up” design rules in readthedocs.io, indicating attention to the topic. Yet, the fact that the rules define “ESD_diffusion” as “A+B31ny diffusion or ESD_nwell_tap connected directly or through a resistor to a Pad or to Vss/Vcc that is covered by areaid.ed and located within a double tap guardrings,” with “+B31” stuffed into the middle of the word “Any” indicating little attention to readability. From the fragmentary wording, it seems that Magic enforces some design rules related to latch-up prevention such as spacing between wells. Other factors are out of Magic’s control -- such as the amount of voltage overshoot expected on an input signal -- so there must be some dividing line where human judgment has to take over. I’ve heard about specialized latch-up tools that extract the characteristics of the parasitic BJTs and then analyze in greater depth, but I have not heard of such a tool being available open source for Sky130. These are just guesses; could somebody give the official line?

Sorry, missed this post for a few days. First, I'm wondering where you found the latchup rules in the online documentation. I can't find them. Anyway, the majority of SkyWater's latchup rules are handled within the padframe. By giving the Caravel chip a fixed padframe, the end user can assume that most of these rules are something they don't have to worry about. Internally, the main latchup rules just require a maximum distance from any non-tap diffusion to some tap diffusion. This rule is 15 microns. Currently the rule is too conservative in magic, because of an ambiguous statement about a division at 200 microns from the padframe; inside that boundary, the rule is 15um while outside that boundary, the rule is 6um. I found out fairly recently that this rule is supposed to be measured from the inside of the seal ring, not the padframe. Since the distance from the seal ring to the user area is always > 200um, only the 15 micron distance latchup rule applies.