Tim: Your sentence with "sadly" stuck with me and I got the idea to explore the boundaries of the design envelope with the GF180 pdk (based hpretl's Docker from a month ago). I was able to use splitpaint to create a wire with a bend of a weird angle and a transistor with poly and diffusion as 45 degree wires (so the FET was at angled at 45 degrees -- see image). I messed with this for some time and I do not think there were any DRC errors. The extraction also looked OK. When I tried to make an annular transistor and I got DRC error that I did not understand ("only 45 degrees allowed on transistors" -- which is confusing: what about 0 and 90 degrees?), but did not clearly indicate that such a transistor was unconstructable. My overall point is that I cannot find documentation on the limits of the "design envelope" and using the tool gives surprises. Empirical evidence suggest that Sky130 is more limited that GF180. Thread in Slack Conversation