I have a question about the Housekeeping SPI in Caravel. Is it possible to use the Housekeeping SPI to directly interface a user design in the user project area? I have a couple config registers in my design, that are mostly static, but will be changed from time to time manually for different tests and adjustments. Or is it better to have a completely custom interface (like JTAG, UART or SPI) through the User IO?

There is only one wishbone master which is in the processor. The housekeeping module is a wishbone slave, so it has no ability to access registers outside of its own internally defined ones. However, if you want to get really clever, you could make use of some housekeeping registers that aren't affecting the chip in any way (because they are configuration registers for a disabled feature, for example), then run a program on the SoC that monitors the value and then uses that value to make some change in the user project. Or the SPI can be used to generate an interrupt which the processor can handle, basically the same as what I said above except that it runs on an interrupt handler so the processor can be doing something else otherwise. In both cases, the processor would be communicating with the user project through the usual wishbone or logic analyzer interfaces. Another good option is that you define an SPI interface on four other pins, wire them directly to the housekeeping SPI pins on the development board, then use software control to configure the GPIOs so that one or the other of them is enabled.