I am making a dynamic comparator and while going t...
# analog-design
p
I am making a dynamic comparator and while going through Razavi's pdf on comparators I found this equation for calculating the threshold voltage. Now for sky130 nfets where do I find the Avth mentioned in the equation. If there is any other way to calculate the threshold voltage for sky130 please let me know.
c
Although not explicitly documented you can find the parameter in the PDK. For example for the nfet_01v8 device its called "sky130_fd_pr__nfet_01v8__vth0_slope". On a short search i found the definition of the parameter in "sky130_fd_pr__nfet_01v8__mismatch.corner.spice"
p
@Christoph Weiser I could not find the exact value for this slope parameter, however in sky130_fd_pr__nfet_01v8__tt.corner.spice I found several values regarding the vth. Not sure if this is the slope value or the actual Vth. Specifically I am looking for a threshold voltage less than 10mV. But it seems in the calculation they are adding an offset of 0.78882, according to the spice file. Is it even possible to achieve such low threshold with sky130?
l
Look at this file: https://github.com/google/skywater-pdk-libs-sky130_fd_pr/blob/f62031a1be9aefe902d6[…]6f59b57627436/cells/nfet_01v8/sky130_fd_pr__nfet_01v8.pm3.spice at lines 85
+ toxe = {4.148e-009*sky130_fd_pr__nfet_01v8__toxe_mult+sky130_fd_pr__nfet_01v8__toxe_slope_spectre*(4.148e-09*sky130_fd_pr__nfet_01v8__toxe_mult*(sky130_fd_pr__nfet_01v8__toxe_slope/sqrt(l*w*mult)))}
and 92
+ vth0 = {0.49439+sky130_fd_pr__nfet_01v8__vth0_diff_0+sky130_fd_pr__nfet_01v8__vth0_slope_spectre*(sky130_fd_pr__nfet_01v8__vth0_slope/sqrt(l*w*mult))}
The slope variables are at: https://github.com/google/skywater-pdk-libs-sky130_fd_pr/blob/f62031a1be9aefe902d6[…]/cells/nfet_01v8/sky130_fd_pr__nfet_01v8__mismatch.corner.spice
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j
Hi, you say: "If there is any other way to calculate the threshold voltage for sky130 please let me know" I understand that the equation dont gives the value of Vth of M1 and M2 but the mismatch beetwen that values, please someone correct if im wrong
p
I worked my way around, the 10mV threshold by adding an input offset of 700mV that way, the dynamic comparator works perfectly. I am able to get 5mV resolution in voltage difference between VINP and VINM.
Is there any specific rule to follow, for correct W/L for dummy transistors?
l
Have you run any monte carlo simulations? Dummies should have the same W and L than the actual circuit transistors. Not the same multipliers. But this is something for layout, unless you're talking about charge injection with dummies connected to your signal nodes.
p
@Luis Henrique Rodovalho I ran monte carlo simulations with 'tt_mm' corner and all of them looks well within limits. As a starting point I set W/L to one-fourth of the adjacent transistors. I am using these dummies for the layout as the dummies will minimize mismatch between the transistor pairs in the comparator. I will set the dummies to the same size as the adjacent transistors and run simulation again. Is there any effect due to these dummies in the ngspice prelayout/postlayout simulations or are these required as a precautionary measure for fabrication?
l
There are no differences in simulations with and without dummies, as far as I know. I don't think this PDK models proximity effects.
As rule of thumb, consider that the MC models are for well made layouts. Poorly made layouts, without dummies, interdigitation, common-centroid, etc., would have even worse results after fabrication.