Hi All Any idea regarding this issue while RTL simulation in open-source-silicon.dev #openram

Hi All ....Any idea regarding this issue while RTL...

sangamanath

07/26/2023, 10:17 AM

Hi All ....Any idea regarding this issue while RTL simulation in caravel integration

Matthew Guthaus

07/27/2023, 10:04 PM

This is not an openram memory signal.

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