hi everyone! i tried modify clock period to 400, ...
# generalu
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07/10/2023, 12:10 PMhi everyone! i tried modify clock period to 400, cap margin 40 to fix hold time violation.. but still it has violation.
Also it represent Error 134 after make finish. What could i do? Thanks for any help ๐
v
Vijayan Krishnan
07/10/2023, 12:25 PMshare your config.mk
Vijayan Krishnan
07/10/2023, 12:28 PMWhat is your goal here?
u
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07/10/2023, 12:34 PMThanks so much! i used example nangate45/swerv config.mk file! My goal is no error make and no violation..
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07/11/2023, 3:23 AMexport DESIGN_NAME = swerv
export PLATFORM = nangate45
export VERILOG_FILES = ./designs/src/$(DESIGN_NAME)/swerv_wrapper.sv2v.v
export SDC_FILE = ./designs/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc
export CORE_UTILIZATION = 40
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 5
export PLACE_DENSITY_LB_ADDON = 0.20
v
Vijayan Krishnan
07/11/2023, 3:30 AMWhere is CAP_MARGIN defined?
u
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07/20/2023, 8:14 AMI defined cap_margin and slew_margin on floorplan.tcl!
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07/25/2023, 8:21 AM@Vijayan Krishnan Thank you so much! I defined CAP_MARGIN and SLEW MARGIN on config.mk and it works!
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