ALOK PRATAP SINGH
07/03/2023, 3:08 PMStefan Schippers
07/03/2023, 4:54 PMxschem test_ac.sch
break the loop at the lower terminal of the feedback resistor, insert a "pass only DC" filter, restore the broken feedback loop loading condition, apply a voltage source with 0V dc and AC 1 0" signal on M4 gate, remove any other AC signal from voltage sources, (suggestion: do not use weird characters for node names, remove the + in Vin+) The vout is the open loop transfer function. Plot magnitude and phase and you get the phase margin (180 - phase shift when gain is 1).Stefan Schippers
07/03/2023, 4:55 PM