Started to tapeout after a long time. The same design was taped out successfully in mpw7. Same design is not passing LVS due to power signals. Is there any changes in how we define the power connections to the macros?

Looks like the connections to cpu are incorrect in the layout. The normally unused

vssa1

(in digital designs) is connecting to the `cpu`’s

vssd1

and

vssd1

is connected to the `cpu`’s

vccd1

. Can you visually confirm this in the layout? Have you switched from the old

config.tcl

file to the new

config.json

file?

Yes, I am using config.json.

From https://openlane.readthedocs.io/en/latest/reference/configuration.html Comma-delimited variables such as

FP_PDN_MACRO_HOOK

and

GRT_OBS

must be expressed in a pretty unorthodox way in JSON for now, either:

"FP_PDN_MACRO_HOOKS": "first item, second item, third item"

or:

"FP_PDN_MACRO_HOOKS": [
        "first item,",
        "second item,",
        "third item"
    ]

You’ll notice that even as an array, all items except for the last item must include a comma in the string itself. This is an unfortunate limitation with how Tcl handles arrays, i.e., they’re just whitespace-delimited strings. So try changing to (add a

,

before the

"

)

"FP_PDN_MACRO_HOOKS": [
    "mprj vccd1 vssd1 vccd1 vssd1,",
    "cpu0 vccd1 vssd1 vccd1 vssd1"
]

Thanks David, it's working now. ✌️