<@U016EM8L91B> I am designing a level shifter with...
# magic
p
@Tim Edwards I am designing a level shifter with 1.8v and 3.3v supplies but in the layout when I turn on DRC full and Drc euclidean on it gives me this error.
All HV nwell can contain only HV diffusion .(diff/tap.21)
m
@PramitKumar Pal for you upper nwell tap, instead of
nsubstratendiff
and
nsubstratecontact
try
mvnsubstratendiff
and
mvnsubstratecontact
.
p
Okay, let me try
@Mitch Bailey Thank you, that solved the problem
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