Hi, I'm trying to design step up switch capacitor converter. Which takes 1.5V as input and gives 4.5V as output. Operating frequency is 1kHz with 50% duty cycle. I have attached pics for the design. the input frequency is fed to the non-overlapping clock generator and then used to switch mosfets. can someone help me with my master's project, please. I have tried to change capacitor values, adding some load but didn't got as expected.

@Pritesh Ps If you’re using devices that will see voltage differences greater that 1.8v, you should use the 5V version of the logic from the

hvl

library.

I'm using 20v pmos from 'fd_sc_hd' library which comes with xschem + ngspice+ sky130. I'm not aware of hvl library and also how to include it for simulation.

Great! The discrete mosfets look ok. How about the standard logic cells. There’s a property on the logic symbols indicating the library. You can change that from

hd

to

hvl

. The

hvl

library is included in the standard

volare

pdks. I imagine you can just add another include line, replacing the 2

fd_sc_hd

with

fd_sc_hvl

.

Use 5V devices. They are enough and more versatile. You will need buffers for your non-overlap clocks. If you want a 4.5 V output, you may need more rectifier steps.

@Mitch Bailey Thank for the library suggestion. however After changing it, it doesn't getting recognized in simulation. Am I doing anything wrong?

I think you need to change the prefix in the xschem property window from

sky130_fs_sc_hd__

to

sky130_fd_sc_hvl__

.

@Mitch Bailey yes it worked. thanks again.

You're using nvt transistors. Maybe it is the problem. I'm not sure also if native NMOS transistors have isolated substrates in this technology. Additionally, 5V transistors can't have lengths below 0.5 um. Is there a symbol with the bulk terminal available? you should use them.