GitHub
05/17/2023, 11:19 PM8.3.398
When there are multiple labels on a net, magic sometimes chooses the non-port label which results in LVS port mismatch.
The net* signals in serv_1
port list are internal signals that are shorted to ports.
serv_1.v
assign io_oeb[0] = net566;
assign io_oeb[1] = net567;
assign io_oeb[2] = net568;
assign io_oeb[3] = net569;
assign io_oeb[4] = net570;
assign io_out[2] = net571;
assign io_out[3] = net572;
assign io_out[4] = net573;
serv_1.ext
equiv "io_oeb[0]" "net566"
equiv "io_oeb[1]" "net567"
equiv "io_oeb[2]" "net568"
equiv "io_oeb[3]" "net569"
equiv "io_oeb[4]" "net570"
user_project_wrapper.gds.spice
.subckt serv_1 net568 io_in[3] net569 net567 net573 net571 net570 io_out[1] io_out[0]
+ io_in[0] io_in[4] io_in[1] io_in[2] net566 net572 vdd vss
This results in mismatched ports at th serv_1
level
Circuit 1: serv_1 |Circuit 2: serv_1
------------------------------------------------------------------------|------------------------------------------------------------------------
net571 |io_oeb[3] **Mismatch**
and after altering ports to match, at the top level
serv_1 u_serv_1 (.vdd(vdd),
...
.io_oeb({_08_,
_07_,
_06_,
io_oeb[18],
io_oeb[17]}),
Top level pin list.
io_oeb[18] |(no matching pin)
io_oeb[17] |(no matching pin)
Explicitly flattening serv_1
results in a match.
Ports are expected to have precedence over internal node text.
To reproduce,
export PDK=gf180mcuC
tar xzf test-gflvs.tgz
cd test-gflvs
./run_test
Not a minimal case, but only takes about 10 minutes.
lvs.noflatten.report
will contain the mismatched results without flattening.
lvs.flatten.report
will contain the matched results with flattening (the size errors are netgen issue).
test-gflvs.tgz
RTimothyEdwards/magic