mohamed hassan
05/10/2023, 7:59 PMTim Edwards
05/10/2023, 9:01 PMmohamed hassan
05/10/2023, 10:53 PMMitch Bailey
05/10/2023, 11:02 PMnetgen -batch lvs "PMOS2.spice PMOS2" "pmos_tb.spice pmos_tb" /openpdk/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl
The second parameter in the netlist specification is the cell name to compare.
Your extracted netlist has capacitors which probably aren’t needed for LVS. What commands did you use to extract the layout?mohamed hassan
05/10/2023, 11:03 PMMitch Bailey
05/10/2023, 11:07 PMextract all
, can you do
extract no all
extract do local
extract no all
turns off all the extraction options.mohamed hassan
05/10/2023, 11:07 PMMitch Bailey
05/10/2023, 11:14 PMmohamed hassan
05/10/2023, 11:14 PMMitch Bailey
05/10/2023, 11:15 PMnetgen -batch lvs "PMOS2.spice PMOS2" "pmos_tb.spice pmos_tb" /openpdk/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl
mohamed hassan
05/10/2023, 11:15 PMMitch Bailey
05/10/2023, 11:16 PMpmos_tb.spice PMOS2
should be pmos_tb.spice pmos_tb
PMOS2.spice pmos_tb
should be PMOS2.spice PMOS2
mohamed hassan
05/10/2023, 11:18 PMMitch Bailey
05/10/2023, 11:51 PMcomp.out
mohamed hassan
05/10/2023, 11:55 PMMitch Bailey
05/11/2023, 8:05 AMSimulation->LVS netlist: Top level is a .subckt
spiceprefix=X
property.mohamed hassan
05/11/2023, 8:17 AM