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#analog-design
Title
# analog-design
a

Andrew Wright

05/02/2023, 3:54 AM
Roberto, x Small state machine to ramp currents: Start with a higher freq clock. Lets say 8X of the optimum clock freq for CP output. Using one 4 bit counter, one 3 bit counter and one 3 bit divider. Cycle 1 : 1 high, Switch to low count to 16 (1/128th of final current) Cycle 2 : 1 high, Switch low, Count to 8 (1/64 of final current) Cycle 3: 1 high, switch low, count to 4 (1/32th of final current) Cycle 4: 1 high, switch low, count to 2 (1/16th of final curent) Cycle 5: 1 high, switch low, count to 1 (1/8 of final current) Cycle 6: divide clock by 2: 1 high, 1 low (1/4 of final current Cycle 7: divide clock by 4: 1 high, 1 low (1/2 of final current) Cycle 8: divide clock by 8: 1 high, 1 low (Final current) Obviously you can choose when to transition between the cycles
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