@Matthew Guthaus I’m looking at the

openram_sense_amp

schematic.

.SUBCKT sky130_fd_bd_sram__openram_sense_amp BL BR DOUT EN VDD GND
X1000 GND EN a_56_432# GND sky130_fd_pr__nfet_01v8 W=0.65 L=0.15 m=1
X1001 a_56_432# dint_bar dint GND sky130_fd_pr__nfet_01v8 W=0.65 L=0.15 m=1
X1002 dint_bar dint a_56_432# GND sky130_fd_pr__nfet_01v8 W=0.65 L=0.15 m=1

X1003 VDD dint_bar dint VDD sky130_fd_pr__pfet_01v8 W=1.26 L=0.15 m=1
X1004 dint_bar dint VDD VDD sky130_fd_pr__pfet_01v8 W=1.26 L=0.15 m=1

X1005 BL EN dint VDD sky130_fd_pr__pfet_01v8 W=2 L=0.15 m=1
X1006 dint_bar EN BR VDD sky130_fd_pr__pfet_01v8 W=2 L=0.15 m=1

X1007 VDD dint_bar DOUT VDD sky130_fd_pr__pfet_01v8 W=1.26 L=0.15 m=1
X1008 DOUT dint_bar GND GND sky130_fd_pr__nfet_01v8 W=0.65 L=0.15 m=1

.ENDS sky130_fd_bd_sram__openram_sense_amp

When

EN

is low, I think all paths from

GND

to `dint`/`dint_bar` are cut-off. Won’t this result in indeterminate input to the

DOUT

inverter? Am I missing something?

When EN=0, the BR is connected to dint_bar with transistor X1006. This is a typical "sense amp isolation" scheme where the bitlines get disconnected during sensing, otherwise, the bitlines are driving the DOUT inverter.

@Matthew Guthaus thanks! I see my (rookie) mistake now. So when the read only port is disabled with

csb1

high,

bank_0/s_en1

will always be low and

DOUT

will be the inverse of

BR

, right?

That is a good point during the disabled operation. I think it might be floating then because it doesn't get precharged.

Thanks for checking.