Hello everyone, I am trying to run the openlane flow to a "counter" that I have designed in verilog, but the flow is failing giving me the error shown in the screenshot.
a
Arman Avetisyan
04/22/2023, 9:22 PM
post the error, you only have the warning in the screenshot
m
Mudasir
04/22/2023, 10:50 PM
Here is the error:
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Vijayan Krishnan
04/23/2023, 3:37 AM
Increase the core area
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Mudasir
04/23/2023, 3:18 PM
How big it should be, I am using 2000 x 2000.
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Vijayan Krishnan
04/23/2023, 3:38 PM
Share issue_reproducible
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Arman Avetisyan
04/23/2023, 5:21 PM
2000 by 2000 is like 2um on 2um, try 100um x 100um at least