If I changed the delay cycle to

1

, the pulse width of the toggling signal is expected to be

1/10MHz = 100 ns

, However, I can't see the correct waveform toggling at 100ns. My sampling rate of the signal analyzer is

100MS/sec

so I think it's enough. I even tried to increase the delay cycle to 10, 100, 1000 and all showing an unexpected low speed square wave. It seems that the delay cycle should be large enough for the chip to "digest" the program or something? I couldn't figure it out whats happening here?

while(1) {

        reg_mprj_datal = 0x00000000;
        reg_mprj_datah = 0x00000000;

        reg_gpio_out = 0x0;

        delay(1);

        reg_mprj_datal = 0xffffffff;
        reg_mprj_datah = 0xffffffff;

        reg_gpio_out = 0x1;

        delay(1);

	}